RWIP: Region-Level Write-Intensity Prediction for GPU L2 Cache Based on Hybrid-Retention STT-MRAM

Spin-transfer torque MRAM (STT-MRAM) is a promising technology for scaling GPU L2 caches thanks to its high density and near-zero leakage power. However, its high write latency and energy make simply replacing SRAM with STT-MRAM unattractive under the massive write traffic and concurrency of modern GPUs. This work observes that GPU writes exhibit strong coarse-grained spatial locality, such that cache blocks mapped to the same region tend to share similar write intensity. Motivated by this insight, we propose Region-Level Write-Intensity Prediction (RWIP) for GPU L2 cache based on hybrid-retention STT-MRAM. The L2 cache is partitioned into a low-retention (LR) region for write-intensive data and a high-retention (HR) region for read-dominant and long-lived data. RWIP instantiates a lightweight per-subpartition Region Predictor Table (RPT), which is accessed only after a write miss in both the LR and HR regions. RWIP leverages early region-level write activity to predict the write intensity of incoming cache blocks, thereby proactively allocating write-intensive blocks into the LR region. On average, compared to baseline GPU with SRAM-based L2 cache and the prior typical work, RWIP improves instructions per cycle (IPC) by 19% and 6%, respectively, and reduces L2 dynamic power by 20% and 14%, respectively. Moreover, the high density of STT-MRAM allows RWIP to provision a larger L2 cache under an equal on-chip area, reducing DRAM power by 54% on average relative to the baseline.