TY - JOUR
T1 - Quantitative Analysis of Electrical Tree Growth With Partial Discharge Characteristics of PCB Double Layer Under AC Voltage
AU - Song, Jianhong
AU - Lv, Zepeng
AU - Wu, Kai
AU - Cheng, Yonghong
AU - Wu, Zhenyu
AU - Zeng, Xianghuan
AU - Qi Li, Steven
N1 - Publisher Copyright:
© 1994-2012 IEEE.
PY - 2025
Y1 - 2025
N2 - With the development of electronic technology, electronic devices are moving toward high power and miniaturization. Printed circuit board (PCB), as an important insulation support in electronic devices, is difficult to meet the development needs of power electronic devices. As an important insulation degradation phenomenon, the electric tree is also detected in PCBs. However, the issue of insulation degradation between PCB layers has not been thoroughly studied. In this article, a V-shape double-layer electrode is designed to investigate the insulation failure caused by the electrical tree between layers of PCB. By analyzing the phase-resolved partial discharge (PRPD) pattern and voltage difference (dV) plots of electrical tree growth, the partial discharge (PD) characteristics and electrical tree growth characteristics at different stages of electrical tree growth between layers are studied. PD inception voltage (PDIV) (VI) and PD extinction voltage (VX) during the growth of a nonconductive tree are estimated. The quantitative relationship between PD and tree length is investigated. It is found that PD maximum magnitude and VI-VX and tree length show a linear relationship in the stage of nonconductive tree growth. The ratio of PD maximum magnitude to VI-VX and tree length is approximately equal to a constant. To explain the relationship between tree length and PD maximum magnitude, VI and VX in the non-conductive tree, a dynamic PD propagation in nonelectric tree model is proposed. This method can quantitatively analyze the electrical defects of power equipment only through PD information. This has great potential for application in the defect assessment of PCBs.
AB - With the development of electronic technology, electronic devices are moving toward high power and miniaturization. Printed circuit board (PCB), as an important insulation support in electronic devices, is difficult to meet the development needs of power electronic devices. As an important insulation degradation phenomenon, the electric tree is also detected in PCBs. However, the issue of insulation degradation between PCB layers has not been thoroughly studied. In this article, a V-shape double-layer electrode is designed to investigate the insulation failure caused by the electrical tree between layers of PCB. By analyzing the phase-resolved partial discharge (PRPD) pattern and voltage difference (dV) plots of electrical tree growth, the partial discharge (PD) characteristics and electrical tree growth characteristics at different stages of electrical tree growth between layers are studied. PD inception voltage (PDIV) (VI) and PD extinction voltage (VX) during the growth of a nonconductive tree are estimated. The quantitative relationship between PD and tree length is investigated. It is found that PD maximum magnitude and VI-VX and tree length show a linear relationship in the stage of nonconductive tree growth. The ratio of PD maximum magnitude to VI-VX and tree length is approximately equal to a constant. To explain the relationship between tree length and PD maximum magnitude, VI and VX in the non-conductive tree, a dynamic PD propagation in nonelectric tree model is proposed. This method can quantitatively analyze the electrical defects of power equipment only through PD information. This has great potential for application in the defect assessment of PCBs.
KW - Electrical tree
KW - partial discharge (PD)
KW - printed circuit board (PCB)
KW - pulse sequence analysis
UR - https://www.scopus.com/pages/publications/85208231165
U2 - 10.1109/TDEI.2024.3487816
DO - 10.1109/TDEI.2024.3487816
M3 - 文章
AN - SCOPUS:85208231165
SN - 1070-9878
VL - 32
SP - 1703
EP - 1711
JO - IEEE Transactions on Dielectrics and Electrical Insulation
JF - IEEE Transactions on Dielectrics and Electrical Insulation
IS - 3
ER -