Embedded Microfluidic cooling for System on wafer: Thermal design and CFD simulation

With the continuous growth of semiconductor integration, conventional cooling techniques fail to meet the stringent thermal management demands of high-power-density system-on-wafer (SoW) platforms. This study proposes a hierarchical embedded microchannel cooling architecture that ensures macroscale uniform liquid distribution via multi-stage fractal manifolds and enhances local heat dissipation through modular 2×2 manifold units. For a 36-chip system operating at 15 kW total power and a heat flux of 512 W/cm², CFD simulations show the design maintains a maximum junction temperature of 65.6°C at a flow rate of 36 L/min, with a pressure drop of 182 kPa and an average thermal resistance of 2.71 mK/W. Moreover, the hydrothermal performance factor (HTPF) and average convective heat transfer coefficient are introduced as comprehensive performance metrics, demonstrating the architecture's optimal trade-off between thermal efficiency, hydraulic loss, and scalability, making it well-suited for cooling high-density heterogeneous integration systems.