Design and Optimization of High Performance Gate Driver for Medium-Voltage SiC Power Modules

The high voltage and fast switching speed characteristics of medium-voltage (MV) silicon carbide (SiC) power semiconductors demand the targeted design of high-performance gate drivers, which involves increasing the voltage isolation rating and reducing coupling capacitance. Focusing on the gate driver design for a MV SiC power module, this paper proposes an isolation gate driver with two distinct gate driver power supply (GDPS) structure. Based on multilayer planar transformer, the first design achieves excellent insulation capabilities by separating the primary and secondary side with FR4. To further improve the electric performance, a comprehensive analysis from material, structure and circuit is made to optimize and redesign the GDPS. The second design adopt PTFE material with lower relative permittivity than that of silicone gel, diminishing the electric field within the silicone gel. Four-layers winding PCBs with copper traces situating within the central two layers are designed to further eliminating potential insulation weakness points. The isolation barrier of the second design provides PD-free operation up to 10kV for 10minuts under partial discharge (PD) test. The optimized gate driver possesses a coupling capacitor of 6.18pF which has been reduced by 29.05% than that of first design.