An optimal digital pulse-width-modulated dither technique to enhance the resolution of wide bandgap device-based high frequency power converters

Wide bandgap semiconductors have been increasingly adopted to enhance the efficiency and reduce the volume of power converters, as these devices are able to switch at dozens of megahertz or even 100 megahertz with lower power losses. However, such a high frequency operation may impose a challenge to the digital control system, and the required clock frequency should be up to 100 gigahertz in high precision applications, which is difficult to realize in low-cost microprocessors such as field-programmable gate array (FPGA). Instead of using hardware-dependent high frequency clocks, an alternative solution is to utilize digital pulse-width-modulated (DPWM) dither techniques to enhance the DPWM resolution. Unfortunately, this is achieved at the expense of introducing low frequency harmonics, which may complicate the output filter and system controller design. In this paper, an optimal dither technique is proposed to enhance the resolution of DPWM power converters. The concepts of positive dither and negative dither are first proposed in this paper. Furthermore, vector diagram-based analysis indicates that with the combination of positive dithers, negative dithers and a carefully selected dither sequence, the lowest order harmonics can be completely eliminated when the dither period is multiples of six switching periods. In other cases, the proposed optimal dither technique can produce minimized lowest order harmonics. Finally, experimental results obtained from a synchronous buck converter validate the feasibility of the proposed technique.