An Active Gate Charge Controlled Driver for SiC MOSFET with Zero Turn-off Loss

This paper presents an analysis of the turn-off transient in SiC MOSFETs, deriving the theoretical conditions for achieving zero turn-off loss and calculating the corresponding critical gate resistance value. Based on this analysis, an active gate driver for SiC MOSFETs utilizing gate charge control is proposed. By employing a lower turn-off voltage to enable rapid device turn-off while precisely regulating the extracted gate charge, this method achieves ultra-low turnoff losses without risking gate overvoltage breakdown. A double-pulse test circuit was implemented in LTspice to conduct comparative simulations between the proposed active gate driver and conventional gate driver. Under test conditions of 1 kV/60 A, the proposed active gate driver demonstrated over 90% reduction in turn-off losses compared to conventional gate diver, while maintaining stable ultra-low loss performance across varying load currents.