TY - JOUR
T1 - A Time-Domain-Model-Based Digital Synchronous Rectification Algorithm for >CLLC Resonant Converters Utilizing a Hybrid Modulation
AU - Pei, Long
AU - Jia, Lixin
AU - Wang, Laili
AU - Zhao, Lie
AU - Song, Shaojie
AU - Pei, Yunqing
AU - Yang, Xu
AU - Gan, Yongmei
N1 - Publisher Copyright:
© 1986-2012 IEEE.
PY - 2022/3/1
Y1 - 2022/3/1
N2 - For bidirectional CLLC resonant converters, synchronous rectification (SR) is a key technique that can reduce the conduction losses in rectifying side by replacing the diodes with the switches' channel. However, existing methods suffer from either complex hardware, or incomplete and imprecise control effect. Aiming at solving these problems, this article proposes a digital sensorless SR algorithm based on the time-domain model under a hybrid modulation for CLLC converters. The proposed approach can precisely enable the SR drive action within almost the whole load range and without any additional hardware, e.g., antiparallel diode, SR IC, and high bandwidth sensor. Its implementation only needs to measure dc signals (e.g., the output current), rather than any high-frequency resonant signals. Additionally, the presented algorithm can be easily implemented on a digital controller. Finally, experiments have been performed on a prototype to verify the validity and applicability of the presented SR algorithm.
AB - For bidirectional CLLC resonant converters, synchronous rectification (SR) is a key technique that can reduce the conduction losses in rectifying side by replacing the diodes with the switches' channel. However, existing methods suffer from either complex hardware, or incomplete and imprecise control effect. Aiming at solving these problems, this article proposes a digital sensorless SR algorithm based on the time-domain model under a hybrid modulation for CLLC converters. The proposed approach can precisely enable the SR drive action within almost the whole load range and without any additional hardware, e.g., antiparallel diode, SR IC, and high bandwidth sensor. Its implementation only needs to measure dc signals (e.g., the output current), rather than any high-frequency resonant signals. Additionally, the presented algorithm can be easily implemented on a digital controller. Finally, experiments have been performed on a prototype to verify the validity and applicability of the presented SR algorithm.
KW - CLLC
KW - resonant converter
KW - synchronous rectification
KW - time-domain model
UR - https://www.scopus.com/pages/publications/85116872174
U2 - 10.1109/TPEL.2021.3116211
DO - 10.1109/TPEL.2021.3116211
M3 - 文章
AN - SCOPUS:85116872174
SN - 0885-8993
VL - 37
SP - 2815
EP - 2829
JO - IEEE Transactions on Power Electronics
JF - IEEE Transactions on Power Electronics
IS - 3
ER -