A High Energy Efficiency Discrete-Time Σ Δ Modulator Based on Floating Inverter Amplifier

The development of Internet of Things (IoT) has put forward more demands for energy-efficient ADCs. In high-precision applications with SNDR greater than 90dB, over-sampled ADC is the most important selection. Traditional Σ -Δ ADC is based on operational transconductance amplifier (OTA) with high power consumption. This limits the improvement in the energy efficiency of Σ Δ ADC. This work designs a discrete-time sigma-delta modulator (DTSDM) based on floating inverter amplifier (FIA). FIA builds integrator instead of traditional OTA, eliminating static power consumption. The tradeoff between gain, speed and reservoir capacitance is analyzed to further improve energy efficiency. Cascode and improved two-stage FIA balance the DC gain with stability. An energy-efficient successive approximation register (SAR) ADC, coupled with a simplified Digital Weight Algorithm (DWA), is used in the proposed 3-bit quantization module. The power consumption is only 85.2μW and the figure of merit (FoM) is up to 182.6dB under a high precision quantization level of 98.9dB SNDR.