摘要
A four-stage continuous-time linear equalizer (CTLE) in a 28-nm CMOS process is presented. The proposed CTLE provides peaking gain at a Nyquist frequency of ∼16 GHz, as well as mid-frequency boosting for low-frequency channel-loss compensation. An ultrafine gain-tuning scheme employing an extra positive-feedback path is proposed and analyzed, which enables both a large gain-tuning range and fine gain-tuning steps. The dc gain covers a wide range from −3.81 to 11.29 dB with a step size of less than 0.3 dB, and the peaking gain at Nyquist frequency can be adjusted from −3.52 to 13.48 dB with a step size of less than 0.9 dB, while providing a large boost range of 13 dB. The CTLE consumes 32-mW power from a 0.9-V supply.
| 源语言 | 英语 |
|---|---|
| 页(从-至) | 559-562 |
| 页数 | 4 |
| 期刊 | IEEE Microwave and Wireless Technology Letters |
| 卷 | 33 |
| 期 | 5 |
| DOI | |
| 出版状态 | 已出版 - 1 5月 2023 |
学术指纹
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