TY - GEN
T1 - VLSI design of 3D display processing chip for head-mounted display
AU - Ge, Chenyang
AU - Zheng, Nanning
AU - Mei, Kuizhi
AU - Zhao, Jizhong
PY - 2009
Y1 - 2009
N2 - In order to develop the core chip supporting binocular stereo displays for head-mounted display (HMD) and glasses-TV, a VLSI design scheme is proposed by using pipeline architecture for 3D display processing chip (HMD100B). Some key techniques including stereo display processing and high precision video scaling based on bicubic interpolation, and their hardware implementations are presented. A new method of field rate up-conversion for analog stereo video signal (CVBS) is proposed, and it can eliminate the large area of flicker. The proposed HMD100B chip is verified by FPGA, and the stereo display image is clear. As one of innovative and high integration SoC chip, HMD100B is designed by digital and analog mixed circuit. It can support binocular stereo display, has better scaling effect and integration. Hence it is applicable in virtual reality (VR), 3D games and other microdisplay domains.
AB - In order to develop the core chip supporting binocular stereo displays for head-mounted display (HMD) and glasses-TV, a VLSI design scheme is proposed by using pipeline architecture for 3D display processing chip (HMD100B). Some key techniques including stereo display processing and high precision video scaling based on bicubic interpolation, and their hardware implementations are presented. A new method of field rate up-conversion for analog stereo video signal (CVBS) is proposed, and it can eliminate the large area of flicker. The proposed HMD100B chip is verified by FPGA, and the stereo display image is clear. As one of innovative and high integration SoC chip, HMD100B is designed by digital and analog mixed circuit. It can support binocular stereo display, has better scaling effect and integration. Hence it is applicable in virtual reality (VR), 3D games and other microdisplay domains.
KW - 3D display
KW - Field rate up-conversion
KW - Head-mounted display
KW - SoC
KW - Video scaling
UR - https://www.scopus.com/pages/publications/74349103257
U2 - 10.1109/ICEGIC.2009.5293596
DO - 10.1109/ICEGIC.2009.5293596
M3 - 会议稿件
AN - SCOPUS:74349103257
SN - 9781424444601
T3 - 1st International IEEE Consumer Electronic Society's Games Innovation Conference, ICE-GiC 09
SP - 25
EP - 28
BT - 1st International IEEE Consumer Electronic Society's Games Innovation Conference, ICE-GiC 09
T2 - 1st International IEEE Consumer Electronic Society's Games Innovation Conference, ICE-GiC 09
Y2 - 25 August 2009 through 28 August 2009
ER -