Abstract
In multiprocessor systems, diagnosability serves as an effective metric to assess the fault diagnosis capability, indirectly reflecting the fault tolerance and security levels of these systems. The failures of processors in a multiprocessor system inevitably affect the performance and security of the entire system by impacting its interconnection network. A higher level of diagnosability indicates a stronger fault diagnosis capability, leading to improved system security and stability. In real-world scenarios, the physical links connecting processors can also fail. When both processors and physical links fail simultaneously, the concept of h-edge tolerable diagnosability becomes particularly suitable for assessing a system's hybrid fault diagnosis capability. This paper constructs an interconnection network through the lexicographic product of paths and cycles and determines the h -edge tolerable diagnosability of this network under the PMC model.
| Original language | English |
|---|---|
| Pages (from-to) | 6-12 |
| Number of pages | 7 |
| Journal | Proceedings of the International Conference on Advanced Computer Theory and Engineering, ICACTE |
| Issue number | 2024 |
| DOIs | |
| State | Published - 2024 |
| Event | 17th International Conference on Advanced Computer Theory and Engineering, ICACTE 2024 - Hefei, China Duration: 13 Sep 2024 → 15 Sep 2024 |
Keywords
- cycles
- fault diagnosis
- h -edge tolerable diagnosability
- interconnection networks
- lexicographic product
- paths
- PMC model
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