Abstract
In this paper the implications, merits and demerits of foster network and cauer network adopted in high voltage direct current (HVDC) thyristor junction temperature calculation are discussed. Then a new piecewise lumped network is proposed to represent the transient thermal impedance of thyristor. The convergence of circuit response is proved by simulation, and the transient thermal impedance characteristics for thyritor and its inner molybdenum and silicon slices are demonstrated by simulation. Finally, the thyristor junction temperature excursion under 3-loop fault current for the Jinping to Sunan 800 kV HVDC project is calculated, and the proposed piecewise lumped network model is validated by comparing the results obtained from simulation against the one obtained from the now common foster or cauer network. The special efficiency of the model in dealing with problems such as dissipation distribution, coupling relations between material thermophysical properties and temperature, temperature distribution in axial direction is checked, which enhance the convenience and flexibility of the new model.
| Original language | English |
|---|---|
| Pages (from-to) | 156-163 |
| Number of pages | 8 |
| Journal | Zhongguo Dianji Gongcheng Xuebao/Proceedings of the Chinese Society of Electrical Engineering |
| Volume | 33 |
| Issue number | 15 |
| State | Published - 25 May 2013 |
Keywords
- Cauer network
- Equivalent network mode
- Foster network
- High voltage direct current (HVDC)
- Junction temperature
- Piecewise lumped network
- Thyristor