TY - GEN
T1 - Stick to the script
T2 - 12th ACM/IEEE Symposium on Architectures for Networking and Communications Systems, ANCS 2016
AU - Zhang, Peng
AU - Li, Hao
AU - Hu, Chengchen
AU - Hu, Liujia
AU - Xiong, Lei
N1 - Publisher Copyright:
© 2016 ACM.
PY - 2016/3/17
Y1 - 2016/3/17
N2 - Software defined networks provide new opportunities for automating the process of network debugging. Many tools have been developed to verify the correctness of network configurations on the control plane. However, due to software bugs and hardware faults of switches, the correctness of control plane may not readily translate into that of data plane. To bridge this gap, we present VeriDP, which can monitor "whether actual forwarding behaviors are complying with network configurations". Given that policies are well-configured, operators can leverage VeriDP to monitor the correctness of the network data plane. In a nutshell, VeriDP lets switches tag packets that they forward, and report tags together with headers to the verification server before the packets leave the network. The verification server pre-computes all header-to-tag mappings based on the configuration, and checks whether the reported tags agree with the mappings. We prototype VeriDP with both software and hardware OpenFlow switches, and use emulation to show that VeriDP can detect common data plane fault including black holes and access violations, with a minimal impact on the data plane.
AB - Software defined networks provide new opportunities for automating the process of network debugging. Many tools have been developed to verify the correctness of network configurations on the control plane. However, due to software bugs and hardware faults of switches, the correctness of control plane may not readily translate into that of data plane. To bridge this gap, we present VeriDP, which can monitor "whether actual forwarding behaviors are complying with network configurations". Given that policies are well-configured, operators can leverage VeriDP to monitor the correctness of the network data plane. In a nutshell, VeriDP lets switches tag packets that they forward, and report tags together with headers to the verification server before the packets leave the network. The verification server pre-computes all header-to-tag mappings based on the configuration, and checks whether the reported tags agree with the mappings. We prototype VeriDP with both software and hardware OpenFlow switches, and use emulation to show that VeriDP can detect common data plane fault including black holes and access violations, with a minimal impact on the data plane.
UR - https://www.scopus.com/pages/publications/84971430864
U2 - 10.1145/2881025.2881038
DO - 10.1145/2881025.2881038
M3 - 会议稿件
AN - SCOPUS:84971430864
T3 - ANCS 2016 - Proceedings of the 2016 Symposium on Architectures for Networking and Communications Systems
SP - 81
EP - 86
BT - ANCS 2016 - Proceedings of the 2016 Symposium on Architectures for Networking and Communications Systems
PB - Association for Computing Machinery, Inc
Y2 - 17 March 2016 through 18 March 2016
ER -