Abstract
In current design the circuitry is extended very close to the edges of a silicon die to maximize useful surface area. When the die is bonded to a polymer substrate, with the circuitry facing the polymer, thermal misfit stress concentrates at the die edges and may damage the circuitry. The stress distribution near a die edge is quantified using a combination of asymptotic analysis and finite element calculation. The asymptotic field consists of two modes of singular stresses, scaling with the distance from the edge r as, respectively, r-λ1; and r-λ2, where λ1 > λ2. It is shown that the more singular field (i.e. the λ1-singularity) prevails in an exceedingly small zone, smaller than 10-6 times the die thickness. Once both modes are included, however, the asymptotic field matches the full field in a zone about 10-1 times the die thickness. This finding resolves several controversies in the literature on electronic packaging. The near-edge stress distribution is presented for various substrate thicknesses, elastic moduli and thermal expansion coefficients. The results can be used to explore design options.
| Original language | English |
|---|---|
| Pages (from-to) | 67-76 |
| Number of pages | 10 |
| Journal | Acta Materialia |
| Volume | 47 |
| Issue number | 1 |
| DOIs | |
| State | Published - 11 Dec 1998 |
| Externally published | Yes |
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