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Sensitivity of heavy-ion-induced single event burnout in SiC MOSFET

  • Hong Zhang
  • , Hong Xia Guo
  • , Feng Qi Zhang
  • , Xiao Yu Pan
  • , Yi Tian Liu
  • , Zhao Qiao Gu
  • , An An Ju
  • , Xiao Ping Ouyang
  • XiangTan University
  • Northwest Institute of Nuclear Technology

Research output: Contribution to journal › Article › peer-review

17 Scopus citations

Abstract

The energy deposition and electrothermal behavior of SiC metal-oxide-semiconductor field-effect transistor (MOSFET) under heavy ion radiation are investigated based on Monte Carlo method and TCAD numerical simulation. The Monte Carlo simulation results show that the density of heavy ion-induced energy deposition is the largest in the center of the heavy ion track. The time for energy deposition in SiC is on the order of picoseconds. The TCAD is used to simulate the single event burnout (SEB) sensitivity of SiC MOSFET at four representative incident positions and four incident depths. When heavy ions strike vertically from SiC MOSFET source electrode, the SiC MOSFET has the shortest SEB time and the lowest SEB voltage with respect to direct strike from the epitaxial layer, strike from the channel, and strike from the body diode region. High current and strong electric field simultaneously appear in the local area of SiC MOSFET, resulting in excessive power dissipation, further leading to excessive high lattice temperature. The gate-source junction area and the substrate-epitaxial layer junction area are both the regions where the SiC lattice temperature first reaches the SEB critical temperature. In the SEB simulation of SiC MOSFET at different incident depths, when the incident depth does not exceed the device's epitaxial layer, the heavy-ion-induced charge deposition is not enough to make lattice temperature reach the SEB critical temperature.

Original languageEnglish
Article number018501
JournalChinese Physics B
Volume31
Issue number1
DOIs
StatePublished - Jan 2022
Externally publishedYes

Keywords

  • Monte Carlo method
  • SiC MOSFET
  • TCAD
  • lattice temperature
  • single event burnout

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