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POSTER: Accelerate GPU Concurrent Kernel Execution by Mitigating Memory Pipeline Stalls

  • North Carolina State University
  • Xi'an Jiaotong University

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

In this study, we demonstrate that the performance may be undermined in the state-of-the-art intra-SM sharing schemes for concurrent kernel execution (CKE) on GPUs, due to the interference among concurrent kernels. We highlight that cache partitioning techniques proposed for CPUs are not effective for GPUs. Then we propose to balance memory accesses and limit the number of inflight memory instructions issued from concurrent kernels to reduce memory pipeline stalls. Our proposed schemes significantly improve the performance of two state-of-the-art intra-SM sharing schemes, Warped-Slicer and SMK.

Original languageEnglish
Title of host publicationProceedings - 26th International Conference on Parallel Architectures and Compilation Techniques, PACT 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages144-145
Number of pages2
ISBN (Electronic)9781467395243
DOIs
StatePublished - 31 Oct 2017
Event26th International Conference on Parallel Architectures and Compilation Techniques, PACT 2017 - Portland, United States
Duration: 9 Sep 201713 Sep 2017

Publication series

NameParallel Architectures and Compilation Techniques - Conference Proceedings, PACT
Volume2017-September
ISSN (Print)1089-795X

Conference

Conference26th International Conference on Parallel Architectures and Compilation Techniques, PACT 2017
Country/TerritoryUnited States
CityPortland
Period9/09/1713/09/17

Keywords

  • Concurrent kernel execution
  • GPUs
  • Memory pipeline
  • Memory subsystem

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