Parameter optimization design of commutation circuit of hybrid fault current limiter

The simulation of a traditional type of hybrid fault current limiter applied in 10 kV distribution network system is studied, which is composed of a fast switch in the main circuit, a pre-charging capacitor in series with an inductor and thyristors in the commutation circuit. The result shows that the rise rate and peak value of the recovery voltage of the fast switch have much to do with the parameters of devices in the commutation circuit. If these parameters have a bad collocation, the fast switch will have a breakdown. An improved topology-a thyristor in parallel with the fast switch is described. When the current of fast switch becomes zero, the thyristor will play a role of conducting the current, so the voltage across the switch will be clamped at a low value for a time called low voltage time. By theoretical analysis, it is found that the capacitor and inductor in the commutation circuit exert great influence on the length of the low voltage time and their relationship is studied in particular. By the low voltage experiment, the relationship is tested and verified. For the design of the fast switch, an appropriate length of low voltage time can be obtained by adjusting these parameters to reduce the requirements for the opening speed and dielectric recovery of the fast switch.