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Multilevel Heterointerface Engineering Breaks the Trap-Barrier Trade-Off in High-Energy-Density Polymer Dielectrics

  • Yang Liu
  • , Zhenjun Shao
  • , Jin Qian
  • , Tiezhu Guo
  • , Jian Bao
  • , Diming Xu
  • , Weichen Zhao
  • , Zhentao Wang
  • , Zilin Huang
  • , Jiajia Ren
  • , Jinnan Liu
  • , Ziyang Liu
  • , Jiwei Zhai
  • , Yao Zhou
  • , Zenghui Liu
  • , Tao Zhou
  • , Guiwei Yan
  • , Jinzhan Su
  • , Wenyuan Liu
  • , Wenfeng Liu
  • Jordi Jacas, Joan Ramon Morante Lleonart, Andreu Cabot, Di Zhou
  • Xi'an Jiaotong University
  • Tongji University
  • Hangzhou Dianzi University
  • Catalonia Institute for Energy Research
  • University of Barcelona
  • ICREA

Research output: Contribution to journalArticlepeer-review

Abstract

The low energy density, inefficient operation, and thermal instability of polymer dielectrics hinder the deployment of film capacitors under harsh environmental conditions. Interface engineering has emerged as a powerful strategy to introduce charge traps or construct interfacial barriers, thereby regulating carrier dynamics and enhancing energy storage. Here, we propose a multilevel heterointerface engineering strategy that integrates boron nitride and barium niobate nanosheets through lattice interlocking. The large work-function offset and bandgap contrast induce interfacial band bending and a built-in electric field, forming a complementary trap-barrier network that guides, blocks, and confines charge carriers. This design effectively suppresses charge injection and mobility, enhances interfacial polarization, and mitigates the propagation of breakdown pathways. Consequently, BNO@BN/PEI composites achieve exceptional energy storage performance, delivering 9.02 J cm−3 (η = 92%) at room temperature and sustaining 6.1 J cm−3 (η ≈ 90%) at 150°C, while still preserving 4.6 J cm−3 at 200°C. First-principles calculations and finite element simulations further validate the structural and functional superiority of the multilevel heterointerface. This work establishes multilevel heterointerface engineering as a generalizable paradigm for breaking the trap-barrier trade-off in conventional dielectric design and paves the way for next-generation high-energy-density and thermally robust polymer capacitors.

Original languageEnglish
Article numbere17624
JournalAdvanced Materials
Volume38
Issue number16
DOIs
StatePublished - 17 Mar 2026

Keywords

  • interface barriers
  • multilevel heterointerface engineering
  • polymer dielectrics
  • regulating carrier dynamics

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