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LDBR: Low-deflection bufferless router for cost-sensitive network-on-chip design

  • Xi'an Jiaotong University
  • Macau University of Science and Technology

Research output: Contribution to journal › Article › peer-review

11 Scopus citations

Abstract

In network-on-chip (NoC) designs, the bufferless router is more energy-efficient than the conventional router with buffers. However, in the bufferless network, deflections cause great performance loss. In this paper, three deflection models are firstly constructed for analyzing the causes of deflections. Then, we propose a low-deflection bufferless router (LDBR), in which a multi-channel network interface and a novel deflection routing based on turn model are designed for reducing the deflections during packet transmissions. Finally, LDBR is evaluated against the latest bufferless routers using synthetic and real-world traffic patterns. The experimental results exhibit that the deflection rate of LDBR network is reduced by 41% compared to other bufferless networks, and LDBR also shows superiority in cost and power consumption across all workloads.

Original languageEnglish
Pages (from-to)669-680
Number of pages12
JournalMicroprocessors and Microsystems
Volume38
Issue number7
DOIs
StatePublished - Oct 2014

Keywords

  • Bufferless router
  • Cost-sensitive
  • Deflection routing
  • Low-deflection
  • Network on chip

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