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Fault-tolerant routing for on-chip network without using virtual channels

  • Xi'an Jiaotong University

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

20 Scopus citations

Abstract

Thanks to its less design complexity, less power consumption and service time, to avoid using virtual channel has became a very attractive approach to building future reliable and mas-sively parallel many-core systems. Furthermore, less area of the light-weight router decrease the probability of failure. To this end, by constructing an acyclic channel dependency graph that breaks all cycles and preserves connectivity of the network, we propose a new deadlock-free fault-tolerant adaptive routing without virtual channel. Extensive exper-iments of 8x8 2D-mesh network demonstrate 99.73% and 97.56% reliability under uniform random traffic when 10% and 20% of the links are failed.

Original languageEnglish
Title of host publicationDAC 2014 - 51st Design Automation Conference, Conference Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781479930173
DOIs
StatePublished - 2014
Event51st Annual Design Automation Conference, DAC 2014 - San Francisco, CA, United States
Duration: 2 Jun 20145 Jun 2014

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Conference

Conference51st Annual Design Automation Conference, DAC 2014
Country/TerritoryUnited States
CitySan Francisco, CA
Period2/06/145/06/14

Keywords

  • Fault tolerance
  • Networks-on-Chip
  • Reliability
  • Without virtual chan-nels

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