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Fast SMT-Based Fault Tolerance Verification for Wide Area Networks

  • Ning Kang
  • , Peng Zhang
  • , Hao Li
  • , Jianyuan Zhang
  • Xi'an Jiaotong University

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Configurations of routing protocols in wide area networks (WANs) are highly sophisticated and prone to bugs, leading to severe network outages and security breaches. SMT-based network verification can assist operators in checking the configurations, but it still faces scalability challenges when reasoning about failures: to check whether a property holds when no more than k links fail, a verifier needs to explore a tremendous space of failure scenarios. To this end, this paper proposes VeriBoost, a method that can leverage the topology features of WANs to reduce the space of failure scenarios, thereby improving the scalability of SMT-based verification on WANs. VeriBoost achieves the reduction by pruning links that are irrelevant to a property, and compressing multiple links whose failures have an equivalent impact on the property. Experiments on real WAN topologies show that it speeds up SMT-based verification by 2–47×.

Original languageEnglish
Title of host publicationFormal Methods - 27th International Symposium, FM 2026, Proceedings
EditorsAugusto Sampaio, Marielle Stoelinga
PublisherSpringer Science and Business Media Deutschland GmbH
Pages133-153
Number of pages21
ISBN (Print)9783032262196
DOIs
StatePublished - 2026
Event27th International Symposium on Formal Methods, FM 2026 - Tokyo, Japan
Duration: 18 May 202622 May 2026

Publication series

NameLecture Notes in Computer Science
Volume16557 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference27th International Symposium on Formal Methods, FM 2026
Country/TerritoryJapan
CityTokyo
Period18/05/2622/05/26

Keywords

  • Failures
  • SMT
  • Verification
  • Wide Area Network

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