Enhanced Measurement of On-State Resistance in SiC MOSFETs Through Compensation of Parasitic Inductance-Induced Error

The On-State resistance of SiC MOSFETs is widely used in junction temperature monitoring and aging evaluation. However, existing measurement methods ignored the voltage drop induced by parasitic inductance under high di/dt conditions in high-frequency converters such as LLC, leading to significant errors in On-State resistance measurement. To address the aforementioned issue, this article employs a PCB Rogowski coil to measure di/dt, enabling not only accurate drain-source current measurement but also compensation for the voltage across parasitic inductance, thereby correcting the On-State voltage. The proposed method is validated through experiments conducted on both LLC and Boost converter, achieving high-accuracy measurement with a maximum error of less than 5%.