TY - GEN
T1 - Embedded manifold microchannel cooling for chiplet thermal management
AU - Lu, Guoran
AU - Ye, Yuxin
AU - Wang, Jie
AU - Jiao, Binbin
AU - Kong, Yanmei
AU - Liu, Ruiwen
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - The chiplet architecture enhances chip performance, but it also leads to heat accumulation, necessitating efficient cooling techniques. Recent studies have demonstrated embedded manifold microchannel cooling (EMMC) as a promising thermal management technique. However, there is still a lack of comprehensive investigation on embedded cooling for chiplet architechture. This study introduces the idea of EMMC into the chiplet architecture and proposes the embedded chiplet cooling (ECC), where microchannels are directly etched onto chips and integrated with 3D-printed manifolds. The proposed method ensures all chips to operate under designated heat loads. Under the highest tested heat flux of 81W/cm2 and flow rate of 0.8LPM, the average temperature rise is mitigated to 66.0°C. Results also demonstrate that total thermal resistances decrease with increased flow rates, achieving a total thermal resistance of 0.30K/W at a flow rate of 0.8LPM. Moreover, higher flow rates improve temperature uniformity; when the flow rate increased from 0.4LPM to 0.8LPM under a heat flux of 46.7W/cm2, the standard deviation of chips' temperatures decreased from 8.85°C to 3.09°C Additionally, the proposed cooling technique compensates for height disparity and warpage within chip, ensuring reliability and enabling embedded cooling in more complex scenarios.
AB - The chiplet architecture enhances chip performance, but it also leads to heat accumulation, necessitating efficient cooling techniques. Recent studies have demonstrated embedded manifold microchannel cooling (EMMC) as a promising thermal management technique. However, there is still a lack of comprehensive investigation on embedded cooling for chiplet architechture. This study introduces the idea of EMMC into the chiplet architecture and proposes the embedded chiplet cooling (ECC), where microchannels are directly etched onto chips and integrated with 3D-printed manifolds. The proposed method ensures all chips to operate under designated heat loads. Under the highest tested heat flux of 81W/cm2 and flow rate of 0.8LPM, the average temperature rise is mitigated to 66.0°C. Results also demonstrate that total thermal resistances decrease with increased flow rates, achieving a total thermal resistance of 0.30K/W at a flow rate of 0.8LPM. Moreover, higher flow rates improve temperature uniformity; when the flow rate increased from 0.4LPM to 0.8LPM under a heat flux of 46.7W/cm2, the standard deviation of chips' temperatures decreased from 8.85°C to 3.09°C Additionally, the proposed cooling technique compensates for height disparity and warpage within chip, ensuring reliability and enabling embedded cooling in more complex scenarios.
KW - chiplet
KW - embedded cooling
KW - thermal management
UR - https://www.scopus.com/pages/publications/85207849287
U2 - 10.1109/ITherm55375.2024.10709462
DO - 10.1109/ITherm55375.2024.10709462
M3 - 会议稿件
AN - SCOPUS:85207849287
T3 - InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITHERM
BT - Proceedings of the 23rd IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2024
PB - IEEE Computer Society
T2 - 23rd IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2024
Y2 - 28 May 2024 through 31 May 2024
ER -