Design and Current Balancing Optimization of A 1700V/1000A Multi-chip SiC Power Module

  • Junhui Yang
  • , Yongmei Gan
  • , Laili Wang
  • , Cheng Zhao
  • , Yan Nie
  • , Li Ran

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

11 Scopus citations

Abstract

The rated current of a single SiC MOSFET is always less than 100A at a voltage rating higher than 1.2kV. Therefore, plenty of SiC MOSFET dies paralleled as multichip power modules to increase the current capacity. However, due to the asymmetric layout and the difference between chip parameters, there will be severe current imbalance in power modules, affecting the reliability. This paper presents a multi-chip 1700V/1000A SiC power module, consisting of 18 paralleled chips in each switch of the half-bridge topology. A serial of current balancing optimization method is proposed, including chip classification, the optimization of layout, power terminals and driver loop. Finally, the double pulse test (DPT) is conducted to verify the performance of the power module.

Original languageEnglish
Title of host publicationICPE 2023-ECCE Asia - 11th International Conference on Power Electronics - ECCE Asia
Subtitle of host publicationGreen World with Power Electronics
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1952-1958
Number of pages7
ISBN (Electronic)9788957083505
DOIs
StatePublished - 2023
Event11th International Conference on Power Electronics - ECCE Asia, ICPE 2023-ECCE Asia - Jeju, Korea, Republic of
Duration: 22 May 202325 May 2023

Publication series

NameICPE 2023-ECCE Asia - 11th International Conference on Power Electronics - ECCE Asia: Green World with Power Electronics

Conference

Conference11th International Conference on Power Electronics - ECCE Asia, ICPE 2023-ECCE Asia
Country/TerritoryKorea, Republic of
CityJeju
Period22/05/2325/05/23

Keywords

  • SiC power module
  • current balancing optimization
  • large current rating

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