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Chip to wafer temporary bonding with self-alignment by patterned FDTS layer for size-free MEMS integration

  • National Institute of Advanced Industrial Science and Technology

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

In this paper, we present a low-cost and rapid self-alignment process for temporary bonding of MEMS chip onto carrier wafer for size-free MEMS-IC integration. For the first time, a hydrophobic self-assembled monolayer (SAM), FDTS (CF 3(CF 2) 7(CH 2) 2SiCl 3), was successfully patterned by lift-off process on an oxidized silicon carrier wafer. Small volume of H 2O (∼μl/cm 2) was then dropped and spread on the non-coated hydrophilic SiO 2 surface for temporary bonding of MEMS chip. Our results demonstrated that the hydrophobic FDTS pattern on carrier wafer enables rapid and precise self-alignment of MEMS chip onto SiO 2 binding-site by capillary force. After transfer the MEMS chips to target wafer, FDTS can be removed by O 2 plasma treatment or UV irradiation.

Original languageEnglish
Title of host publicationIEEE Sensors 2011 Conference, SENSORS 2011
Pages1121-1124
Number of pages4
DOIs
StatePublished - 2011
Externally publishedYes
Event10th IEEE SENSORS Conference 2011, SENSORS 2011 - Limerick, Ireland
Duration: 28 Oct 201131 Oct 2011

Publication series

NameProceedings of IEEE Sensors

Conference

Conference10th IEEE SENSORS Conference 2011, SENSORS 2011
Country/TerritoryIreland
CityLimerick
Period28/10/1131/10/11

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