Analysis of Gate-Source Voltage Spike Generated by Miller Capacitance and Common Source Inductance

Compared with Si devices, SiC devices have faster switching speed and higher dv/dt and di/dt. High dv/dt through Miller capacitor and high di/dt through common source inductance produce more serious gate-source voltage spike. Meanwhile, limited by the technology of SiC devices and the characteristics of SiC materials, SiC devices have lower gate threshold voltage and lower maximum negative gate voltage. Harsh application environment and fragile SiC devices make it easier for shoot-through and damage. This paper analyzes the mechanism of gate-source voltage spike formed by nonlinear Miller capacitor and common source inductor during tum-on and turn-off, which can better design active gate drive and protection circuit of SiC devices, so as to improve the reliability of devices and converters. Although the tum-on and turn-off processes are mirror symmetrical, due to the different mechanisms of di/dt, dv/dt and the nonlinearity of Miller capacitance, the intensity and polarity of gate source voltage spike generated by Miller capacitor and common source inductor are different. The gate-voltage spike phenomenon is verified by double pulse experiment in this paper.