Analysis of circuit noise in integral electronics piezoelectric accelerometer

This paper studies the main source of noise in an integral electronics piezoelectric (IEPE) accelerometer circuit. When the noise model allows the internal noise to be converted into the input source, the noise's effect on the signals can be easily analyzed by the direct comparison between the input noise and input signal. Then, the noise analysis was simplified by introducing the transformation principle into the T-network noise analysis. The circuit background noise in the IEPE accelerometer within the broadband was derived based on the former analysis, which was verified by the PSpice software. Meanwhile, the method presented different contributions that various noise sources made on the total noise at the input and put forward a method of total noise reduction at different frequencies. These studies provide a theoretical basis for IEPE accelerometer circuit design, parameter selection and performance optimization in low noise. The comparison of the actual value with the theoretical value of an experimental prototype shows the efficacy of this method in reducing the IEPE accelerometer circuit noise.