TY - GEN
T1 - Analysis and suppression of inductive interference in active integrated power electronics module
AU - Chen, Qiaoliang
AU - Yang, Xu
AU - Wang, Zhaoan
AU - Zhang, Lianghua
PY - 2007
Y1 - 2007
N2 - The interference between power stage and driver stage is one of the key points of a module design, especially for high power densities, where couplings are enlarged. This paper focuses on the suppression techniques for inductive coupling between them. As a demonstror, a 2kW single phase PFC active IPEM (Integrated Power Electronic Module), consisting of full bridge rectifier diodes, current sensing resistor and boost converter, has been developed employing CoolMOS and SiC diodes. The electromagnetic interference mechanism in the module is demonstrated. In order to reduce the voltage spike of power devices, three different design patterns are compared for reducing the parasitic self-inductance of critical loop. The approaches for reduction in inductive interference between power critical high di/dt loop and driver testing loop are investigated, including flux cancellation pattern for power high di/dt loop, reduction in electromagnetic interference source and inserting a copper shielding layer between them. Finally, the electrical design considerations are verified by the simulation and experimental results.
AB - The interference between power stage and driver stage is one of the key points of a module design, especially for high power densities, where couplings are enlarged. This paper focuses on the suppression techniques for inductive coupling between them. As a demonstror, a 2kW single phase PFC active IPEM (Integrated Power Electronic Module), consisting of full bridge rectifier diodes, current sensing resistor and boost converter, has been developed employing CoolMOS and SiC diodes. The electromagnetic interference mechanism in the module is demonstrated. In order to reduce the voltage spike of power devices, three different design patterns are compared for reducing the parasitic self-inductance of critical loop. The approaches for reduction in inductive interference between power critical high di/dt loop and driver testing loop are investigated, including flux cancellation pattern for power high di/dt loop, reduction in electromagnetic interference source and inserting a copper shielding layer between them. Finally, the electrical design considerations are verified by the simulation and experimental results.
KW - Inductive interference
KW - Integrated power electronics modules (IPEMS)
KW - PFC
KW - SiC
UR - https://www.scopus.com/pages/publications/48349146745
U2 - 10.1109/PESC.2007.4342238
DO - 10.1109/PESC.2007.4342238
M3 - 会议稿件
AN - SCOPUS:48349146745
SN - 1424406552
SN - 9781424406555
T3 - PESC Record - IEEE Annual Power Electronics Specialists Conference
SP - 1619
EP - 1625
BT - PESC 07 - IEEE 38th Annual Power Electronics Specialists Conference
T2 - PESC 07 - IEEE 38th Annual Power Electronics Specialists Conference
Y2 - 17 June 2007 through 21 June 2007
ER -