An Advanced Design of Power Module with EMI Reduction Method

Due to the high dv/dt slew rate and closely packaged design, the electromagnetic interference (EMI) issue in the high power level integrated power module is extremely serious. In this paper, a novel EMI model of full-SiC MOSFET integrated power module is proposed based on the ANSYS Q3D software and the parasitic capacitance which could influence the EMI characteristics of power module are extracted. Then, a simulation methodology that incorporates co-simulation techniques using ANSYS EM tools is proposed to predict radiated and conducted EMI from power electronic modules. Finally, two synchronous buck experimental platform based on a commercial full-SiC MOSFET integrated power module and a self-created one which optimize the layout are tested and compared. It is found that the intensity of EMI increases as the voltage and current of power module increase. The intensity of the common-mode (CM) EMI presents uniform distribution along with frequency. A resonant peak appears at specific frequency points of the differential-mode (DM) EMI. Due to the optimal layout, the reduction of the parasitic capacitance and inductance will decrease the EMI intensity.