A patch-interactive enhancement network for semiconductor wafer map mixed defect recognition with a two-stage training strategy

To improve the product quality and process reliability in the semiconductor manufacturing, it is of great significance to detect the defect of the wafer map and recognize the defect pattern. With the increase in the complexity of semiconductor chip design and manufacturing processes, a variety of mixed defects appear more and more frequently, and the wafer map mixed defect recognition has become the focus of many scholars. Most of the current defect recognition methods based on deep learning are complex, and do not uniformly solve the problems of weak features, overlapping occlusion, and inter-class similarity of mixed defects in wafer maps. To solve the above-mentioned problems, this paper proposes a novel patch-interactive enhancement network, which integrates patch-interactive enhancement module (PIEM). PIEM can enhance the patch features with high contribution to defect recognition significantly, so as to extract weak and overlapping features. In addition, a two-stage training strategy is proposed for the training difficulty of this task, which divides the training process into two successive stages, trains different modules of the model differently, so that optimizes the model more pertinently and directionally. In order to verify the validity of the proposed method, experiments are carried out on the Mixed-WM38 dataset. The results show that the recognition performance of the proposed model is significantly better than other models, and the proposed training strategy can further improve the model’s performance efficiently.