A novel cavity-first process for flexible fabrication of MEMS on silicon on insulator (SOI) wafer

This paper reports a novel cavity-first approach for producing released MEMS from front side of the silicon on insulator (SOI) wafer. This approach eliminates the requirements to sacrificial layer or wet chemical etching, avoids the damage to other components by vapour-phase HF dry etching, and exhibits excellent compatibility to CMOS. In this approach, prior to metal or SiO ₂ passivation layer deposition, cavities were formed by using vapour-phase hydrofluoric (HF) acid dry etching to remove SiO₂ box layer through release holes with a diameter of a few micrometers, and then an amorphous fluoropolymer thin film was used to re-fill release holes without entering into the cavities. After other processes, MEMS structure can be finally released by inductive coupled plasma reactive ion etching (ICP-RIE) from front side of the wafer. To present the process details and its unique merits, i.e. high efficiency, better thickness uniformity in device layer, and less proof mass loss, a piezoresistive planer MEMS vibration sensor was fabricated by using above approach and its performance was evaluated. The results demonstrated that this approach is considerably valuable to both MEMS flexible fabrication and MEMS-CMOS monolithic integration.