Abstract
This article proposes a nanoscale complementary metal-oxide-semiconductor (CMOS) current reference design for low power analog and digital devices. A self-biased circuit is developed within the current reference. The current reference can compensate for temperature changes and voltage fluctuations. Simulation results showed a low current around 12 nA. The design is capable of working in a broad range of power supply voltages. In the interface with 0.35~\mu m fabrication process, a bias voltage is generated with currents in the nanoampere range. The present current reference is qualified to be used in digital-analog circuits, such as operational amplifiers or oscillators, and is designed to be suitable for energy harvesting interfaces, because of the high efficiency and low power consumption.
| Original language | English |
|---|---|
| Article number | 9109644 |
| Pages (from-to) | 3403-3410 |
| Number of pages | 8 |
| Journal | IEEE Transactions on Electron Devices |
| Volume | 67 |
| Issue number | 8 |
| DOIs | |
| State | Published - Aug 2020 |
| Externally published | Yes |
Keywords
- Current reference
- high efficiency
- integrated circuit (IC)
- low power
- power optimization
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