A high-efficiency loop delay estimator in digital predistortion subsystem

Shitao Zhu; Anxue Zhang; Zhuo Xu; Xiaoli Dong

doi:10.1109/ChinaSIP.2014.6889307

A high-efficiency loop delay estimator in digital predistortion subsystem

Shitao Zhu
, Anxue Zhang
, Zhuo Xu
, Xiaoli Dong

Faculty of Electronic and Information Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

4 Scopus citations

Abstract

A high-efficiency time delay estimation method is presented to obtain the accurate loop delay (including integer and fractional loop delay) between the input signal and the time delayed feedback signal in digital predistortion subsystem within the same process. Compared with the conventional, a sampling position adjusting scheme for complex signals using the piecewise-parabolic filter assisted by a steady decision criterion for limited data length achieves a significant reduction in time complexity and an improvement in loop delay estimation stability and precision. Results from simulations and experiments show that the proposed method is high-efficiency and valid.

Original language	English
Title of host publication	2014 IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	568-571
Number of pages	4
ISBN (Electronic)	9781479954032
DOIs	https://doi.org/10.1109/ChinaSIP.2014.6889307
State	Published - 3 Sep 2014
Event	2nd IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Xi'an, China Duration: 9 Jul 2014 → 13 Jul 2014

Publication series

Name	2014 IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Proceedings

Conference

Conference	2nd IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014
Country/Territory	China
City	Xi'an
Period	9/07/14 → 13/07/14

Keywords

Time delay estimation
digital predistortion subsystem
piecewise-parabolic filter

Access to Document

10.1109/ChinaSIP.2014.6889307

Cite this

Zhu, S., Zhang, A., Xu, Z., & Dong, X. (2014). A high-efficiency loop delay estimator in digital predistortion subsystem. In 2014 IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Proceedings (pp. 568-571). Article 6889307 (2014 IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ChinaSIP.2014.6889307

Zhu, Shitao ; Zhang, Anxue ; Xu, Zhuo et al. / A high-efficiency loop delay estimator in digital predistortion subsystem. 2014 IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2014. pp. 568-571 (2014 IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Proceedings).

@inproceedings{9822cf92d91f4b339db97e2edd49edf3,

title = "A high-efficiency loop delay estimator in digital predistortion subsystem",

abstract = "A high-efficiency time delay estimation method is presented to obtain the accurate loop delay (including integer and fractional loop delay) between the input signal and the time delayed feedback signal in digital predistortion subsystem within the same process. Compared with the conventional, a sampling position adjusting scheme for complex signals using the piecewise-parabolic filter assisted by a steady decision criterion for limited data length achieves a significant reduction in time complexity and an improvement in loop delay estimation stability and precision. Results from simulations and experiments show that the proposed method is high-efficiency and valid.",

keywords = "Time delay estimation, digital predistortion subsystem, piecewise-parabolic filter",

author = "Shitao Zhu and Anxue Zhang and Zhuo Xu and Xiaoli Dong",

note = "Publisher Copyright: {\textcopyright} 2014 IEEE.; 2nd IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 ; Conference date: 09-07-2014 Through 13-07-2014",

year = "2014",

month = sep,

day = "3",

doi = "10.1109/ChinaSIP.2014.6889307",

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series = "2014 IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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booktitle = "2014 IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Proceedings",

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Zhu, S, Zhang, A, Xu, Z & Dong, X 2014, A high-efficiency loop delay estimator in digital predistortion subsystem. in 2014 IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Proceedings., 6889307, 2014 IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Proceedings, Institute of Electrical and Electronics Engineers Inc., pp. 568-571, 2nd IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014, Xi'an, China, 9/07/14. https://doi.org/10.1109/ChinaSIP.2014.6889307

A high-efficiency loop delay estimator in digital predistortion subsystem. / Zhu, Shitao; Zhang, Anxue; Xu, Zhuo et al.
2014 IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2014. p. 568-571 6889307 (2014 IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A high-efficiency loop delay estimator in digital predistortion subsystem

AU - Zhu, Shitao

AU - Zhang, Anxue

AU - Xu, Zhuo

AU - Dong, Xiaoli

PY - 2014/9/3

Y1 - 2014/9/3

N2 - A high-efficiency time delay estimation method is presented to obtain the accurate loop delay (including integer and fractional loop delay) between the input signal and the time delayed feedback signal in digital predistortion subsystem within the same process. Compared with the conventional, a sampling position adjusting scheme for complex signals using the piecewise-parabolic filter assisted by a steady decision criterion for limited data length achieves a significant reduction in time complexity and an improvement in loop delay estimation stability and precision. Results from simulations and experiments show that the proposed method is high-efficiency and valid.

AB - A high-efficiency time delay estimation method is presented to obtain the accurate loop delay (including integer and fractional loop delay) between the input signal and the time delayed feedback signal in digital predistortion subsystem within the same process. Compared with the conventional, a sampling position adjusting scheme for complex signals using the piecewise-parabolic filter assisted by a steady decision criterion for limited data length achieves a significant reduction in time complexity and an improvement in loop delay estimation stability and precision. Results from simulations and experiments show that the proposed method is high-efficiency and valid.

KW - Time delay estimation

KW - digital predistortion subsystem

KW - piecewise-parabolic filter

UR - https://www.scopus.com/pages/publications/84929431278

U2 - 10.1109/ChinaSIP.2014.6889307

DO - 10.1109/ChinaSIP.2014.6889307

M3 - 会议稿件

AN - SCOPUS:84929431278

T3 - 2014 IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Proceedings

SP - 568

EP - 571

BT - 2014 IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2nd IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014

Y2 - 9 July 2014 through 13 July 2014

ER -

Zhu S, Zhang A, Xu Z, Dong X. A high-efficiency loop delay estimator in digital predistortion subsystem. In 2014 IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2014. p. 568-571. 6889307. (2014 IEEE China Summit and International Conference on Signal and Information Processing, IEEE ChinaSIP 2014 - Proceedings). doi: 10.1109/ChinaSIP.2014.6889307

A high-efficiency loop delay estimator in digital predistortion subsystem

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