A CMOS Readout with High-Precision and Low-Temperature-Coefficient Background Current Skimming for Infrared Focal Plane Array

A high-performance CMOS readout structure employing a new background current skimming technique for infrared focal plane array (IFPA) applications is proposed, analyzed, and verified. Both the background current skimming circuit and bias circuit have good immunity to threshold voltage variations. In addition, the background current skimming circuit is also independent of temperature variations. An experimental readout chip has been fabricated using SMIC 0.18- $\mu \text{m}$ 1P6M process technology with a unit-cell size of $30~\mu {\rm m} \times 27~\mu \text{m}$ and a power consumption less than 0.06 mW. With 4 V power supply, the readout integrated circuit provides a dynamic output range over 3 V and an output linearity of >99%. The background suppression current whose level is tunable between 470 nA and 5 $\mu \text{A}$ has a variation of 2.2%, corresponding to a temperature coefficient of 275 ppm/°C. The simulation and experimental results confirmed the good performance of the proposed background current skimming circuit for IFPA applications.