TY - JOUR
T1 - A 5-GSPS continuous-time ΔΣ modulator with nested feedforward compensation OTA and resistive−grounded current-steering DAC achieving 225-MHz bandwidth and 68.5-dB SNR
AU - Ji, Junyao
AU - Li, Peiyu
AU - Wang, Bo
AU - Chen, Youxiang
AU - Shao, Jie
AU - Fan, Xiaojie
AU - Ye, Mingyuan
AU - Xue, Yan
AU - Jiang, Yingdan
AU - Zhang, Jie
AU - Wang, Ruitao
AU - Wang, Xiaofei
AU - Zhang, Hong
N1 - Publisher Copyright:
© 2025 Elsevier Ltd
PY - 2025/11
Y1 - 2025/11
N2 - This paper presents a 5-GSPS, 3rd-order continuous-time (CT) ΔΣ modulator in 28-nm CMOS process for wideband communications, in which operational transconductance amplifiers (OTAs) with nested feedforward compensation (NFC) and resistive-grounded current-steering DAC are proposed to address challenges of nonlinearity and thermal noise. The modulator is designed with a single-loop cascade resonator feedback (CRFB) topology to avoid signal/noise leakage issues in multistage architectures, while reference shuffling and self-timed capacitor-voltage DAC are combined to compensate the excess loop delay (ELD) with immunity to process, voltage and temperature (PVT) variations. A resistive-grounded current-steering DAC is employed in the main feedback path, which reduces thermal noise by about 30 % compared to conventional transistor-based grounding scheme. The OTA with NFC in the integrator adopts negative transconductance with neutralization capacitors to enhance the in-band gain, while an R-2R based programmable resistor structure is also employed for the integrator to realize reconfigurable system coefficients with almost constant input impedance. With a layout area of 0.35 mm2, simulation results demonstrate that the CT ΔΣ modulator achieves a 68.5-dB signal-to-noise ratio (SNR), a 76.6-dB spurious-free dynamic range (SFDR), and an 11.1-bit effective number of bits (ENOB) in 225-MHz bandwidth, with 112-mW power consumption and Schreier figure-of-merit (FoMs) of 162.1-dB.
AB - This paper presents a 5-GSPS, 3rd-order continuous-time (CT) ΔΣ modulator in 28-nm CMOS process for wideband communications, in which operational transconductance amplifiers (OTAs) with nested feedforward compensation (NFC) and resistive-grounded current-steering DAC are proposed to address challenges of nonlinearity and thermal noise. The modulator is designed with a single-loop cascade resonator feedback (CRFB) topology to avoid signal/noise leakage issues in multistage architectures, while reference shuffling and self-timed capacitor-voltage DAC are combined to compensate the excess loop delay (ELD) with immunity to process, voltage and temperature (PVT) variations. A resistive-grounded current-steering DAC is employed in the main feedback path, which reduces thermal noise by about 30 % compared to conventional transistor-based grounding scheme. The OTA with NFC in the integrator adopts negative transconductance with neutralization capacitors to enhance the in-band gain, while an R-2R based programmable resistor structure is also employed for the integrator to realize reconfigurable system coefficients with almost constant input impedance. With a layout area of 0.35 mm2, simulation results demonstrate that the CT ΔΣ modulator achieves a 68.5-dB signal-to-noise ratio (SNR), a 76.6-dB spurious-free dynamic range (SFDR), and an 11.1-bit effective number of bits (ENOB) in 225-MHz bandwidth, with 112-mW power consumption and Schreier figure-of-merit (FoMs) of 162.1-dB.
KW - Continuous-time
KW - Current-steering DAC
KW - Delta-sigma
KW - Excess loop delay
KW - Feedforward compensation OTA
KW - Modulator
UR - https://www.scopus.com/pages/publications/105014545595
U2 - 10.1016/j.mejo.2025.106854
DO - 10.1016/j.mejo.2025.106854
M3 - 文章
AN - SCOPUS:105014545595
SN - 0026-2692
VL - 165
JO - Microelectronics Journal
JF - Microelectronics Journal
M1 - 106854
ER -