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A 3.57-mW 2.88-GHz Multi-Phase Injection-Locked Ring-VCO With a 200-kHz 1/f³ Phase Noise Corner

  • Chao Fan
  • , Ya Zhao
  • , Yanlong Zhang
  • , Jun Yin
  • , Li Geng
  • , Pui In Mak
  • Xi'an Jiaotong University
  • University of Macau

Research output: Contribution to journalArticlepeer-review

15 Scopus citations

Abstract

This brief describes a multi-phase injection-locked ring-VCO (MPIL-RVCO) with an improved phase noise (PN), while offering an inherent low-frequency output. Specifically, the MPIL-RVCO features dual oscillation loops, where the low-frequency RVCO with substantial delay stages is integrated to reduce the 1/f3 phase noise corner ( $\text{f}_{1/{\mathrm{ f}}} ^{3}$ ), whereas the multi-phase sub-outputs can serve to injection-lock the high-frequency output. The PN profile of the injection-locked high-frequency RVCO will up-shift with the injection signal, resulting in low $\text{f}_{1/{\mathrm{ f}}} ^{3}$. Prototyped in 65-nm CMOS, the proposed MPIL-RVCO operating at 2.88 GHz exhibits a PN of $\mathbf {-}96.2$ dBc/Hz at 1-MHz offset, corresponding to a figure-of-merit (FoM) of 160 dBc/Hz and a low 1/f3 PN corner of 200 kHz.

Original languageEnglish
Pages (from-to)865-869
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume70
Issue number3
DOIs
StatePublished - 1 Mar 2023

Keywords

  • 1/f³ phase noise corner
  • CMOS
  • clock generation
  • flicker noise
  • inherent low-frequency output
  • multi-phase injection locking (MPIL)
  • phase noise
  • ring voltage-controlled oscillator (RVCO)

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