A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links

Dan Li; Gabriele Minoia; Matteo Repossi; Daniele Baldi; Andrea Ghilioni; Enrico Temporiti; Francesco Svelto

doi:10.1109/ISCAS.2016.7539052

A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links

Dan Li
, Gabriele Minoia
, Matteo Repossi
, Daniele Baldi
, Andrea Ghilioni
, Enrico Temporiti
, Francesco Svelto

Faculty of Electronic and Information Engineering

STMicroelectronics
Xi'an Jiaotong University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

10 Scopus citations

Abstract

A 25Gb/s silicon photonics receiver comprising an Electronic Integrated Circuit and a Photonic Integrated Circuit fabricated in 65nm CMOS and in PIC25G technologies respectively is presented. The two chips are 3D-integrated using copper pillars. The front-end amplifier introduces low-noise techniques, realizing record-low input-referred noise current of 0.91pArms, leading to the highest sensitivity (OMA = -11.3dBm) among 25Gb/s silicon photonics receivers reported to date.

Original language	English
Title of host publication	ISCAS 2016 - IEEE International Symposium on Circuits and Systems
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	2334-2337
Number of pages	4
ISBN (Electronic)	9781479953400
DOIs	https://doi.org/10.1109/ISCAS.2016.7539052
State	Published - 29 Jul 2016
Event	2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016 - Montreal, Canada Duration: 22 May 2016 → 25 May 2016

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	2016-July
ISSN (Print)	0271-4310

Conference

Conference	2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016
Country/Territory	Canada
City	Montreal
Period	22/05/16 → 25/05/16

Keywords

3D integration
Ge-PD
limiting amplifier
optical receiver
output buffer
silicon photonics
transimpedance amplifier (TIA)

Access to Document

10.1109/ISCAS.2016.7539052

Cite this

Li, D., Minoia, G., Repossi, M., Baldi, D., Ghilioni, A., Temporiti, E., & Svelto, F. (2016). A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links. In ISCAS 2016 - IEEE International Symposium on Circuits and Systems (pp. 2334-2337). Article 7539052 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2016-July). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2016.7539052

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title = "A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links",

abstract = "A 25Gb/s silicon photonics receiver comprising an Electronic Integrated Circuit and a Photonic Integrated Circuit fabricated in 65nm CMOS and in PIC25G technologies respectively is presented. The two chips are 3D-integrated using copper pillars. The front-end amplifier introduces low-noise techniques, realizing record-low input-referred noise current of 0.91pArms, leading to the highest sensitivity (OMA = -11.3dBm) among 25Gb/s silicon photonics receivers reported to date.",

keywords = "3D integration, Ge-PD, limiting amplifier, optical receiver, output buffer, silicon photonics, transimpedance amplifier (TIA)",

author = "Dan Li and Gabriele Minoia and Matteo Repossi and Daniele Baldi and Andrea Ghilioni and Enrico Temporiti and Francesco Svelto",

note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016 ; Conference date: 22-05-2016 Through 25-05-2016",

year = "2016",

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doi = "10.1109/ISCAS.2016.7539052",

language = "英语",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

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booktitle = "ISCAS 2016 - IEEE International Symposium on Circuits and Systems",

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Li, D, Minoia, G, Repossi, M, Baldi, D, Ghilioni, A, Temporiti, E & Svelto, F 2016, A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links. in ISCAS 2016 - IEEE International Symposium on Circuits and Systems., 7539052, Proceedings - IEEE International Symposium on Circuits and Systems, vol. 2016-July, Institute of Electrical and Electronics Engineers Inc., pp. 2334-2337, 2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montreal, Canada, 22/05/16. https://doi.org/10.1109/ISCAS.2016.7539052

A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links. / Li, Dan; Minoia, Gabriele; Repossi, Matteo et al.
ISCAS 2016 - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., 2016. p. 2334-2337 7539052 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2016-July).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Li, Dan

AU - Minoia, Gabriele

AU - Repossi, Matteo

AU - Baldi, Daniele

AU - Ghilioni, Andrea

AU - Temporiti, Enrico

AU - Svelto, Francesco

PY - 2016/7/29

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N2 - A 25Gb/s silicon photonics receiver comprising an Electronic Integrated Circuit and a Photonic Integrated Circuit fabricated in 65nm CMOS and in PIC25G technologies respectively is presented. The two chips are 3D-integrated using copper pillars. The front-end amplifier introduces low-noise techniques, realizing record-low input-referred noise current of 0.91pArms, leading to the highest sensitivity (OMA = -11.3dBm) among 25Gb/s silicon photonics receivers reported to date.

AB - A 25Gb/s silicon photonics receiver comprising an Electronic Integrated Circuit and a Photonic Integrated Circuit fabricated in 65nm CMOS and in PIC25G technologies respectively is presented. The two chips are 3D-integrated using copper pillars. The front-end amplifier introduces low-noise techniques, realizing record-low input-referred noise current of 0.91pArms, leading to the highest sensitivity (OMA = -11.3dBm) among 25Gb/s silicon photonics receivers reported to date.

KW - 3D integration

KW - Ge-PD

KW - limiting amplifier

KW - optical receiver

KW - output buffer

KW - silicon photonics

KW - transimpedance amplifier (TIA)

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PB - Institute of Electrical and Electronics Engineers Inc.

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Li D, Minoia G, Repossi M, Baldi D, Ghilioni A, Temporiti E et al. A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links. In ISCAS 2016 - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc. 2016. p. 2334-2337. 7539052. (Proceedings - IEEE International Symposium on Circuits and Systems). doi: 10.1109/ISCAS.2016.7539052

A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links

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Keywords

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