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A 2 pA/√Hz Input-Referred Noise TIA in 180-nm CMOS With 2.5 GHz Bandwidth for Optical Receiver

  • Yihao Yang
  • , Dan Li
  • , Nan Qi
  • , Binhao Wang
  • CAS - Xi'an Institute of Optics and Precision Mechanics
  • CAS - Institute of Semiconductors

Research output: Contribution to journalArticlepeer-review

3 Scopus citations

Abstract

This letter describes an ultralow-noise, high-speed transimpedance amplifier (TIA) applied to the analog front-end (AFE) circuit of the high-sensitivity optical receiver. A combination of a three-stage amplifier and two positive feedback Miller capacitors is introduced to comprehensively reduce the input-referred noise current (IRNC) of a shunt-feedback TIA (SFTIA) and to extend its bandwidth (BW). The proposed SFTIA utilizes an 80 KΩ resistor as the feedback resistor (RF) and achieves a BW of 2.5 GHz and an average IRNC of only 2 pA√Hz in 180 nm CMOS technology, which is the lowest TIA noise reported to date above the GHz BW. Although the fabrication process is not as advanced as the state-of-the-art process, we believe it remains valuable and instructive for a wide variety of applications requiring low noise and high sensitivity.

Original languageEnglish
Pages (from-to)189-192
Number of pages4
JournalIEEE Solid-State Circuits Letters
Volume8
DOIs
StatePublished - 2025

Keywords

  • CMOS integrated circuits
  • high-speed integrated circuits
  • low noise circuits
  • optical receivers
  • transimpedance amplifier (TIA)

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