Abstract
High-speed optical receivers realized in low-cost technology often suffer from unfavorable performance, dictated by the transimpedance limit, the key design constraint of shunt-shunt feedback transimpedance amplifier (TIA). In this letter, we propose a novel TIA architecture to overcome the transimpedance limit, achieving both low noise and high gain that are not realizable in a conventional topology. A 10-Gb/s optical receiver with sub-microampere input-referred noise current is implemented in a mature 0.18- $\mu \text{m}$ CMOS technology. Wire-bonded with a commercial III-V p-i-n photodiode, the receiver demonstrates the state-of-the-art input-referred noise current of 0.97 $\mu $ Arms and a total transimpedance gain of 68.3 dB $\Omega $ while consuming 45 mA from 1.8-V power supply. Finally, the proposed architecture is applicable to 10 Gb/s beyond to realize low-noise high-gain optical receivers.
| Original language | English |
|---|---|
| Article number | 8093622 |
| Pages (from-to) | 2268-2271 |
| Number of pages | 4 |
| Journal | IEEE Photonics Technology Letters |
| Volume | 29 |
| Issue number | 24 |
| DOIs | |
| State | Published - 15 Dec 2017 |
Keywords
- CMOS
- continuous time linear equalizer (CTLE)
- gain-bandwidth product (GBW)
- low noise
- optical receiver
- transimpedance amplifier (TIA)
- transimpedance limit